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# Quartus II 32-bit Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
# File: /mnt/sda2/WRK/Altera-ChipPlannerTest/eco.txt
# Generated on: Tue Dec 16 16:01:42 2014

# Note: This file contains change records exported from the Change Manager.
#       This data represents the state of the Change Manager at the indicated
#       date and time, for information purposes.

Index,Node Name,Change Type,Old Value,Target Value,Current Value,Disk Value,Applied,Saved,Comment
1,ALUbit0,New Lcell,None,Exists,None,None,FALSE,FALSE,
1.1,ALUbit0,New Lcell,None,Exists,None,None,FALSE,FALSE,
1.2,ALUbit0:COMBOUT:0,Output Port Modification,None,Exists,Data Not Available,None,FALSE,FALSE,
1.3,ALUbit0,Location Index,N/A,LC_X4_Y4_N0,Data Not Available,Data Not Available,FALSE,FALSE,
2,ALUbit1,New Lcell,None,Exists,None,None,FALSE,FALSE,
2.1,ALUbit1,New Lcell,None,Exists,None,None,FALSE,FALSE,
2.2,ALUbit1:COMBOUT:0,Output Port Modification,None,Exists,Data Not Available,None,FALSE,FALSE,
2.3,ALUbit1,Location Index,N/A,LC_X4_Y4_N1,Data Not Available,Data Not Available,FALSE,FALSE,
3,ALUbit2,New Lcell,None,Exists,None,None,FALSE,FALSE,
3.1,ALUbit2,New Lcell,None,Exists,None,None,FALSE,FALSE,
3.2,ALUbit2:COMBOUT:0,Output Port Modification,None,Exists,Data Not Available,None,FALSE,FALSE,
3.3,ALUbit2,Location Index,N/A,LC_X4_Y4_N2,Data Not Available,Data Not Available,FALSE,FALSE,
4,ALUbit3,New Lcell,None,Exists,None,None,FALSE,FALSE,
4.1,ALUbit3,New Lcell,None,Exists,None,None,FALSE,FALSE,
4.2,ALUbit3:COMBOUT:0,Output Port Modification,None,Exists,Data Not Available,None,FALSE,FALSE,
4.3,ALUbit3,Location Index,N/A,LC_X4_Y4_N3,Data Not Available,Data Not Available,FALSE,FALSE,
5,PC0,New Lcell,None,Exists,None,None,FALSE,FALSE,
5.1,PC0,New Lcell,None,Exists,None,None,FALSE,FALSE,
5.2,PC0:COMBOUT:0,Output Port Modification,None,Exists,Data Not Available,None,FALSE,FALSE,
5.3,PC0,Location Index,N/A,LC_X5_Y2_N0,Data Not Available,Data Not Available,FALSE,FALSE,
6,PC1,New Lcell,None,Exists,None,None,FALSE,FALSE,
6.1,PC1,New Lcell,None,Exists,None,None,FALSE,FALSE,
6.2,PC1:COMBOUT:0,Output Port Modification,None,Exists,Data Not Available,None,FALSE,FALSE,
6.3,PC1,Location Index,N/A,LC_X5_Y2_N1,Data Not Available,Data Not Available,FALSE,FALSE,
7,PC2,New Lcell,None,Exists,None,None,FALSE,FALSE,
7.1,PC2,New Lcell,None,Exists,None,None,FALSE,FALSE,
7.2,PC2:COMBOUT:0,Output Port Modification,None,Exists,Data Not Available,None,FALSE,FALSE,
7.3,PC2,Location Index,N/A,LC_X5_Y2_N2,Data Not Available,Data Not Available,FALSE,FALSE,
8,PC3,New Lcell,None,Exists,None,None,FALSE,FALSE,
8.1,PC3,New Lcell,None,Exists,None,None,FALSE,FALSE,
8.2,PC3:COMBOUT:0,Output Port Modification,None,Exists,Data Not Available,None,FALSE,FALSE,
8.3,PC3,Location Index,N/A,LC_X5_Y2_N3,Data Not Available,Data Not Available,FALSE,FALSE,
9,|ChipPlannerTest|clk,Location Index,IOC_X1_Y2_N3,IOC_X8_Y3_N4,IOC_X1_Y2_N3,IOC_X1_Y2_N3,FALSE,FALSE,
10,|ChipPlannerTest|ALUbit0,Sum LUT Mask,0000,E896,Data Not Available,Data Not Available,FALSE,FALSE,
11,eco_atom,New Lcell,None,Exists,Exists,Exists,TRUE,TRUE,
11.1,eco_atom,New Lcell,None,Exists,Exists,Exists,TRUE,TRUE,
11.2,eco_atom:COMBOUT:0,Output Port Modification,None,Exists,Exists,Exists,TRUE,TRUE,
11.3,eco_atom,Location Index,N/A,LC_X4_Y3_N3,LC_X4_Y3_N3,LC_X4_Y3_N3,TRUE,TRUE,
12,eco_atom_1,New Lcell,None,Exists,Exists,None,TRUE,FALSE,
12.1,eco_atom_1,New Lcell,None,Exists,Exists,None,TRUE,FALSE,
12.2,eco_atom_1:COMBOUT:0,Output Port Modification,None,Exists,Exists,None,TRUE,FALSE,
12.3,eco_atom_1,Location Index,N/A,LC_X4_Y3_N3,LC_X4_Y3_N3,Data Not Available,TRUE,FALSE,

